The SEM nanoindentation instrument breaks through the scale limitations of traditional mechanical testing through the integrated mode of "imaging testing analysis", providing accurate means for multi-level reliability evaluation of microelectronic devices from materials to structures. In the future, with the further miniaturization of devices (such as 3D stacking and chip integration), their combination with atomic force microscopy (AFM), focused ion beam (FIB) and other technologies will provide a deeper understanding of failure mechanisms at the scale, promoting the continuous improvement of microelectronic reliability.
Technical principles and advantages
The SEM nanoindentation instrument combines the high-resolution imaging of SEM with the mechanical testing function of nanoindentation: it observes the surface morphology of the sample in real time through SEM and locates the target area (such as solder joints, interconnects, thin films, etc.); Subsequently, a micro scale load was applied using a nanoindentation probe, and the relationship between the indentation depth and the load was recorded. The hardness, elastic modulus, creep and other parameters of the material were calculated. Its core advantage lies in in-situ visualization - during the testing process, the deformation, crack initiation, and propagation processes in the indentation area can be observed synchronously, revealing the correlation between microstructure and macroscopic properties; Meanwhile, the nanoscale displacement resolution (usually up to 0.1nm) and load control accuracy (nN level) can meet the testing requirements of ultra-thin thin films (such as gate oxide layers and passivation layers) in microelectronic devices.
Key Applications in Microelectronics Reliability Testing
1. Reliability assessment of interconnect structure: The electrical and stress migration failures of copper/aluminum interconnects in chips often originate from mechanical defects at the interface or between grains. SEM nanoindentation can accurately measure the differences in hardness and modulus of interconnects at different locations (such as grain boundaries and interfaces), identify stress concentration areas, and provide a basis for optimizing processes (such as annealing temperature and doping concentration). For example, by analyzing the indentation response of copper interconnects after thermal cycling, the degree of fatigue resistance degradation can be quantified.
2. Performance characterization of solder joints and packaging materials: The solder joints (such as Sn Pb, lead-free solder) of FlipChip are prone to plastic deformation or cracking due to thermal expansion mismatch during temperature cycling. SEM nanoindentation can perform in-situ testing on individual solder joints without damaging the overall packaging, obtaining key parameters such as yield strength and creep rate, and predicting the failure risk of solder joints in long-term service. In addition, the elastic modulus test of underfill can optimize its compatibility with chips/substrates and reduce interface stress.
3. Reliability analysis of thin films and coatings: The gate oxide layer (with a thickness of only a few nanometers) and passivation layer (such as SiNx) of microelectronic devices need to have high dielectric strength and scratch resistance. SEM nanoindentation can directly measure the intrinsic mechanical properties of thin films by controlling the indentation depth (less than the film thickness) to avoid substrate interference; By observing the peeling or cracking at the edge of the indentation using SEM, the adhesion and impact resistance between the film and the substrate can be evaluated, providing data support for process improvements such as deposition temperature and plasma treatment.