GaN Array Manufacturing: Xiamen SMIC Semiconductor Co., Ltd. uses the Nordson MarchRIE-1701 plasma etching system to manufacture GaN light-emitting diode (LED) arrays using SF6 plasma. Cut 2-inch sapphire based GaNFED epitaxial wafers into 1cm × 1cm chips, use Cu as a mask material, and pattern them by UV lithography. The effects of different RF powers and carrier substrates on the etching rate of GaN, as well as the surface roughness caused by etching, were studied during the etching process. The high-density LED array was successfully manufactured, and the etching uniformity and surface roughness were improved by adding a carrier substrate. After high-temperature annealing, the contact impedance between the metal and GaN was reduced.

Advanced chip pre process etching: Primonova from Zhongwei Company ® Inductively coupled plasma etching equipment is applied for etching of 7-nanometer, 5-nanometer, and more advanced semiconductor devices. The device adopts independent intellectual property rights of inductively coupled plasma etching technology, with innovative designs such as fully symmetrical reaction chamber and ultra-high molecular pump pumping speed. Can be used for various conductor etching processes, such as shallow trench isolation etching (STI) and polysilicon gate etching; It can also be used for dielectric etching, such as SpaceEtch, which can provide a wider process window for chip manufacturing and achieve lower manufacturing costs. It has been running normally on multiple customer production lines with stable yield.

8-inch wafer gate etching: In the gate etching process of 8-inch wafers, a composite system combining GXS and a plasma etching machine is used. The production data of the chip foundry shows that this combination can stabilize the vacuum degree of the etching chamber at 5 × 10 ⁻⁴ mbar, achieve a SiO ₂ etching rate of 1200 Å/min, and the on-chip uniformity error is ≤ 1.5%. Compared to the previous oil sealed pump solution, the defect rate after etching has decreased from 0.35% to 0.08%, and the annual production capacity of a single device has increased by about 2300 pieces.

Semiconductor copper interconnect process: In the semiconductor copper interconnect process, the metal oxide layer is treated using a plasma etching machine. Through specific processes, the residual oxide layer can be controlled at<0.5nm, effectively improving the quality of the process. In wafer level packaging, the yield rate increased from 92% to 99.6% after using this process.